1. Field of the Invention
The present invention relates to a method for forming an isolation layer of a semiconductor device, and more particularly to a method for forming an isolation layer of a semiconductor device for preventing increase of a moat depth and occurrence of defects due to formation of a liner nitride layer.
2. Description of the Prior Art
As semiconductor memory devices become more highly integrated, isolation between unit devices is achieved by a shallow trench isolation (hereinafter, referred to as an STI) process which can minimize a bird's beak.
Further, in performing the STI process, technology has been introduced, which forms a liner nitride layer before deposition of an oxide layer buried in a trench in order to solve the reduction of a refresh time due to the miniaturization of devices.
This is because the liner nitride layer prevents a silicon substrate from oxidizing by the following process, thereby improving an STI profile, reducing micro-electrical stress onto a junction portion simultaneously, and finally improving a refresh characteristic. Therefore, the yield and reliability of elements increase.
However, in the prior art, when an isolation layer is formed employing a liner nitride layer, the following problems occur.
Firstly, the liner nitride layer increases the depth of a moat, thereby causing the reduction of a threshold voltage Vt and finally increasing off current.
Secondly, in a burn-in test performed after a D-RAM device is assembled, an interfacial surface between the liner nitride layer on a side surface of the isolation layer and a sidewall oxide layer is excited even under conditions of low electric field and functions as a trapping center of hot electrons acting as a source of leakage current, thereby forming a strong electric field on a PMOS drain region and increasing drain current, that is, off current due to the reduction of a channel length. Therefore, the device is degraded.
This phenomenon is called “hot carrier degradation” and has a bad influence on the reliability of a semiconductor device.